There are many noise sources in electronics that can occur inside and outside of a system.
Noise coupling suppression techniques are implemented at the circuit design level and in a physical layout to suppress specific noise sources.
The effectiveness of noise coupling suppression techniques can be assessed in pre-layout and post-layout simulations.
These earplugs can’t be used as a noise coupling suppression technique in electronic circuits
Anyone that’s zoomed into a low-level signal readout on an oscilloscope should be familiar with noise that can arise in electronic circuits. A variety of intrinsic noise sources occur and become visible at low signal levels. In other systems that run at typical logic levels, extrinsic noise arises due to electromagnetic interference and coupling between circuits. Any of these noise sources requires a specific circuit or strategy to reduce coupling strength, reduce noise, or both.
Noise coupling suppression techniques involve designing a certain circuit to suppress a given noise source, using a specific component, or placing some feature in a physical layout. For PCB designers, it’s quite easy to modify a physical layout in an effort to suppress various noise sources. If you’re a PCB layout designer, keep reading to see what tools you can use to suppress different types of noise in your system.
Matching Noise Coupling Suppression Techniques to Noise Sources
Noise generally refers to any unwanted signal that appears on an interconnect or in a circuit, and it can arise from multiple sources. At times, it can be difficult to pinpoint specific noises to specific sources unless you know what to look for. When noise is detected in a circuit or interconnect, it helps to know the various coupling mechanisms that cause noise to appear where it isn’t wanted.
All electronic noise will ultimately manifest itself as an unwanted signal that is read out at a receiver, meaning there is a mechanism that induces some voltage/current in a victim circuit or interconnect. Noise is coupled via three possible mechanisms:
Conduction: Any noise current that is generated in one circuit can be conducted into another circuit due to direct contact between the noise source and victim circuit.
Electric field coupling: This is a general way to refer to induction of displacement current in a dielectric due to the presence of an electric field. In terms of circuit models, this refers to coupling through parasitic capacitance.
Magnetic field coupling: A changing magnetic field can induce a current in a conductor via Faraday’s law without requiring direct contact between the noise source and the victim circuit.
The first item above is known as conducted EMI, and it relies on direct contact between a noise source and a victim interconnect/circuit. The last two items above are responsible for coupling radiated EMI into a circuit, which refers to any noise that is not conducted into the victim circuit or interconnect.
Because radiated EMI can induce an electric current and voltage, what starts as radiated EMI can be received as conducted EMI. This means there are two approaches to removing noise in electronic circuits:
Prevent radiated EMI from inducing noise in a circuit capacitively and inductively.
Suppress any conducted EMI, regardless of how it originates in the circuit.
Let’s briefly look at some strategies you can use in a layout to suppress both types of noise in an electronic system.
This is the classic way to remove conducted EMI, as filters act directly on the voltage/current in a circuit. Filters can be broadband, such as low/high pass filters, or extremely narrowband, such as a notch filter. EMI filters can be a single component, such as a common-mode choke, or a complex circuit involving multiple components. These circuits can target a single frequency or a broad range of frequencies.
Filter circuits can remove conducted EMI that originates as radiated EMI. In this way, the filter circuit suppresses any noise coupling from Circuit 1 and Circuit 2
Printed Shielding Structures
This is not a standard term most PCB layout engineers will use, but it generally refers to any structure appearing on a PCB that provides shielding against radiated EMI. These structures are intended to modify the parasitics in a PCB layout, thereby blocking electrically and magnetically induced currents. Some examples of these structures include:
Electronic bandgap structures
Grounded copper pour on surface layers
Additional plane layers
Via fences along important interconnects such as waveguides or antenna feedlines
The goal here is to suppress parasitics that enable magnetic or electrical coupling. Doing this successfully requires extracting models for parasitic capacitance and inductance from a physical layout. Interconnect impedance depends on the value of self-inductance and self-capacitance, and parasitics always create some deviation in the interconnect impedance from the desired value. Some additional printed structures or redesigning the interconnect geometry can reduce parasitics and reduce the strength of any noise coupled into the interconnect via radiated EMI.
As we’ve seen above, there is no specific technique that can suppress every form of noise coupling. The specific noise coupling suppression techniques to use in your system depend on the specific noise source involved and the power being coupled between circuits. A short summary of the noise sources and suppression methods discussed above are summarized in the table below for convenience.
Once you land on a noise reduction technique and are ready to validate it in your system, it’s best to use simulations to evaluate your design before you do a prototyping run. Conducted EMI can be examined in circuit simulations with a SPICE package. Other noise sources can’t be examined at the circuit level unless you have an accurate circuit model describing the system. Because these other suppression mechanisms depend on the exact physical layout, a 3D field solver utility is needed to fully evaluate the effectiveness of many noise suppression techniques. For PCB designers, the best field solver applications are available inside your PCB design tools and will run models directly from your layout data.
No matter what noise sources you need to address, you can apply any of these noise coupling suppression techniques using PCB design and analysis software with an integrated 3D EM field solver and a complete set of CAD tools. Cadence provides powerful software that helps automate many important tasks in systems analysis, including a suite of pre-layout and post-layout simulation features to evaluate your system.