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What Simulations Are Needed for Chip Packaging?

Chip package simulation

Access to package design and production capacity is expanding worldwide, just as western markets start to accept that they can't rely on overseas capacity forever. Packaging production capacity is only half the story, the other half is the need for testing and evaluation before spending resources on prototype substrates and packages. This means designers need to leverage simulation tools in order to fully evaluate package substrates and interconnects.

Packages for heterogeneously integrated components are advanced designs, so of course they will need some electrical simulation. But what other simulations might be needed for these thermo-electromechanical systems? As you might have guessed, ensuring high reliability packaging involves a range of tests, and multi-purpose simulation tools can provide highly accurate results.

Three Simulation Domains for Advanced Packaging

At a high level, ensuring reliability requires looking in three different domains, both in simulation and experiment. Simulation should happen first as this gives the design team an opportunity to modify packaging before testing. The three primary simulation domains are: electrical, mechanical, and thermal.

A typical 3D simulation result for a simple chip package and its lead frame are shown below. While this shows only thermal results, in principle thermal behavior is linked to the other two areas of electrical and mechanical behavior via the package material properties. When looking at reliability, these three areas need to be examined in tandem with specialized simulation software.

chip package simulation

Thermomechanical Simulations

Thermal simulations and mechanical simulations are important individually, but one area that is equally important for ensuring reliability is thermomechanical multiphysics simulations. These simulations could venture into the nonlinear domain for extreme temperature changes or repeated thermal cycling.

When thermal and mechanical behavior are taken together in the same system, we get an important measure of reliability as thermally-induced stresses in the package can be seen. Multiphysics simulations with well-defined material parameters as inputs are needed to execute these simulations and get accurate results. Performance aspects such as fatigue, stress and strain, and interfacial stress due to CTE mismatch can be determined.

Thermal only

  • Steady-state temperature should be known given an average current draw

Mechanical only

  • Mechanical shock response
  • Response to repeated shocks
  • Vibration within packaging


  • Thermal expansion creates stress in various regions of the package

Electrical Simulations

Advanced packages for heterogeneously integrated components are electrically advanced, typically operating at the current most advanced technology node. This typically means data rates are very high, the package interconnect structure is very small, required channel bandwidths are high, and it requires unique wiring approaches like skip layer routing.

When looking inside the package, we see a few areas where full-wave electromagnetic simulations are needed for verification. First, we have signal integrity simulations:

Vertical transitions to the PCB

  • Vias and their passage through internal planes (when present) need to have matched impedance and maintain TEM mode propagation
  • Ball-out typically sets the limiting TEM propagation mode in packages

Substrate channel routing

  • Channels must have low crosstalk
  • Channels must maintain TEM mode propagation

Crosstalk between channels

  • Via arrays in package routing set shielding effectiveness between channels

Bump and RDL interfaces

  • Bump-out and RDL routing can create excessive return loss in channels when not impedance matched

Vertical transitions between dice

  • The vertical transitions between dice in a package are formed with vias or TSVs
  • These transitions are high-speed channels but they also need to be examined in thermomechanical simulations

For simpler interfaces coming onto the PCB through the package, high-speed signal integrity simulations are not as important. For packages supporting advanced components with the newest high-speed interfaces, electrical simulations are very important. Signals cannot be lost before reaching the ball-out on the bottom side of the package, and the list of simulations above intends to identify when this will occur.

An important area to simulate in a package is power distribution. Power integrity and power distribution topology in a package are just as important as they are in a PCB. In fact, the two areas work together to ensure low impedance across very broad bandwidths. Power in packages is largely provided by rails and ultimately comes on to the die bumps via RDL routing. The system must provide low impedance in a higher range of frequencies where the PCB will become inductive.

Power stability

  • Power rail ripple should be predictable based on package parasitics and the structure of the substrate

Current draw

  • Total current draw is required with thermal resistance determination to predict package operating temperature
  • Encapsulant materials can be qualified once current draw is known

Die capacitance

  • Die capacitance and on-package chip capacitance provides low PDN impedance into the GHz range and higher frequencies

Package capacitance and inductance

  • Package capacitance is provided by power rails in the substrate and interposer
  • Vertical rail transitions and bumps have some inductance that increase PDN impedance

The newest simulation modality in this area is power-aware signal integrity, where power faults and power integrity are used as part of the signal Integrity simulation process. These simulation methods are non-trivial and already require very complex SPICE circuits to predict power and signal behavior in the same simulation. The EDA industry is working towards streamlining these simulations and creating a more consistent workflow for these simulations.

Advanced packages for heterogeneously integrated components need to be evaluated with the best set of system analysis tools from Cadence. Only Cadence offers a comprehensive set of circuit, IC, and PCB design tools for any application and any level of complexity. Cadence PCB design products also integrate with a multiphysics field solver for thermal analysis, including verification of thermally sensitive chip and package designs.

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