IC packages continue to get smaller as devices get more advanced, but not just for reasons of increasing pin density. A higher pin density is very important in advanced systems with many interconnects, but an important reason in the most advanced networking components is to set bandwidth limits in interconnects operating in these systems. 224G systems and IP are transitioning from concept to commercial products, which means packaging will need to be designed to meet the bandwidth requirements of these systems.
High-bandwidth in packaging is not a new concept, and package designers know how to build interconnects that can operate at very high frequencies. For example, in MMICs, interfaces can supply high frequencies at relatively high power, and this is possible even without high density packaging. These packages are not new, they have been around for decades in some instances.
The challenge with 224G systems and future generations of these systems is the need for high bandwidth from DC to very high frequencies. This means the BGA packaging, the package substrate, package interposer, and internal package routing must be designed to operate in the lowest order mode propagation regime.
Package Routing Styles for High-Speed Interfaces
Next-generation data center architecture cannot function without correct packaging that can support very high frequency mode propagation in the fundamental (TEM) mode. As is known from transmission line theory, there is an assumption that transmission lines are designed such that the signals involved are propagating in the TEM mode, which would apply up to the minimum bandwidth requirement for the channel. In particular, these factors influence the signal propagation behavior in the packaging:
- Pitch between BGA bumps on bottom side of the package
- Pitch between bumps on semiconductor dice
- Stripline routing inside the package (known as skip-layer routing)
- Size of internal routes in a redistribution layer (RDL)
A look at each portion of the internal routing in a package reveals where these factors converge to determine the bandwidth limit for the package. It should be understood that any one of these factors can limit the total bandwidth of the package, and this would limit the frequencies that can be sourced from the package into a PCB or connector.
Because of bandwidth limiting in 224G channels, package sizes no larger than 0.8 mm ball pitch should be used to support 56 GHz broadband channels. This matches simulation data from Intel and a basic calculation using the overall cavity area around the transition vias.
It is possible to estimate the TEM mode frequency limit with a simple calculation that uses the ball arrangement on the bottom of the package. The calculation proceeds as follows:
First, using the 4-ball by 3-ball square region, the dielectric constant of the package substrate material, and the 0.8 mm limit on the ball pitch, the half-wavelength cutoff frequency would be:
- F = (speed of light in vacuum)/[sqrt(Dk) * 0.8mm * 2 * 2]
If the substrate material is ABF, then Dk = 3.5 and the approximate cutoff value is F = 50 GHz. This is similar to estimates in the 802.3 working group’s simulation data and test data, which set the cutoff for a 0.8 mm pitch package to 59 GHz. When looking at the interior of the package, a similar calculation can be used to determine the first order (TE or TM) mode:
Suppose we are using striplines with approximately 40 microns above and below the differential pairs to the ground plane and 120 microns across the package between the via fence. The TEM cutoff frequency for these striplines would be approximately:
- F = (speed of light in vacuum)/[sqrt(Dk) * 0.12mm * 2]
This gives a result of 667 GHz. Real routing inside the package is a bit more complicated, but this basic estimate illustrates the high bandwidths a package design can support. This simple example, even if the stripline’s distance to ground is an order of magnitude larger, will easily support 224G PAM-4 signals.
How Packages Hit Their Bandwidth Limit
The next two sections detail how we get to the above frequency limitations for TEM mode propagation.
TEM and Non-TEM Modes in Packaging Transmission Lines
Transmission lines, and specifically striplines used in package routing, have very small dimensions that enable very high bandwidth cutoff frequencies for the TEM mode. The image below shows how these lines are typically routed; this involves routing lines (normally differential) between via fences to set the line impedance and provide shielding between nearby lines.
Parameters determining bandwidth cutoff in striplines used in packaging.
In striplines used in packaging, the same factors determining the bandwidth cutoff for the TEM mode in a single stripline also apply to differential striplines. The use of differential striplines for very fast 224G channels is used so that the package does not strongly radiate from the edge of the package substrate. Due to the small sizes of W (about 0.1 mm), the TEM bandwidth limit is very high and you can expect traditional packaging to function very well up to high frequencies.
TEM Limits Due to Ball Pitch
The ball pitch also creates a similar bandwidth limiting effect in packaging. This is because packaging for high data rate interfaces on advanced processors and FPGAs surround the signal pins with ground pins. These pins create what looks like a coaxial differential pair on the bottom side of the package. A typical pin arrangement is shown below, where the red outlined pins are ground connections to the PCB.
Typical package ball arrangement.
Each of the signal pins on the bottom side of the package are part of a differential pair. The nearest ground pins around the signal pins are responsible for determining the TEM mode cutoff because the region around these signal balls looks like a rectangular closed cavity, so a smaller cavity will always have a higher cutoff for the lowest resonant mode. This is because the vias act like a via fence, and they perform two functions:
- Confining the signal power around the vias in order to reduce crosstalk
- Influence the impedance of the differential vias connecting the package to the PCB
Once the signal bandwidth exceeds the TEM cutoff, some of the signal will propagate as a higher order mode (TE or TM mode), and the mode will present a definite wave pattern around the conductors in the various package regions. First, in the skip-layer region, you might have a TEM mode that exists around each of the copper lines which prevents wideband propagation at bandwidths above 56 GHz. In the ball region on the bottom of the package, you might have a TEM mode that exists around the pairs of balls coming into the PCB landing pads. Both are undesirable for modern ASICs that use differential pairs for lines at 224G.
How to Evaluate Package Bandwidth
The above calculation is just a rough calculation that takes a stripline or package bump pair, and it approximates these as a rectangular waveguide. But due to the impact of the via/ball spacing, and the central conductors, the package routing does not actually function in this way.
The only way to determine the behavior of signals and the electromagnetic fields around signal conductors is to use an electromagnetic field solver. The data calculated with the field solver application is used to build simulation models for each portion of the 224G package. The basic process of these simulation tools is as follows:
- Electromagnetic field calculations are used to determine the S-parameters for each portion of the package interconnect (bump-to-bump)
- The S-parameters are regressed into a linear network for each portion of the network
- The linear network extracted from the S-parameter data can be modified to optimize the channel model
- Other factors like equalization and transmission lines on the PCB can be added to the model
The transition from TEM behavior into non-TEM behavior can be seen when looking at the intensity pattern, usually in a 2D plane as a color coded intensity map. The image below shows a simple example with a rectangular dielectric waveguide, where an electromagnetic wave enters two different modes (TE and TEM).
In summary, package designers need to design interconnect geometry not just for low loss, but also for high bandwidth. Currently, the main factor that limits channel bandwidth is ball pitch on packages. This means another bandwidth doubling in accordance with Moore’s Law may result in package sizes that reach the limits of conventional package fabrication technology. Any time a package design is being designed, it should be simulated throughout the interconnect, reaching from bump-to-bump inside the package.
Packages are the last mile that allows a component to function as designed. When your design team needs to understand the interactions between packaging designs and interconnects involving the PCB and connectors, use the system analysis tools from Cadence to design and simulate your 224G PAM-4 systems. Only Cadence offers a comprehensive set of circuit, IC, and PCB design tools for any application and any level of complexity. Cadence PCB design products also integrate with a multiphysics field solver for thermal analysis, including verification of thermally sensitive chip and package designs.