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How Selective Harmonic Elimination is Used in Circuits

selective harmonic elimination

Circuits that use switching elements, rectification, and nonlinear filtering to produce clean sine waves often contain excess harmonic content in the output sinusoid, which can span up to very high frequencies. These harmonics are signals at multiples of the fundamental (targeted) sine frequency. This becomes a problem in terms of EMC when we look at conducted emissions and radiated emissions.

If signals with unintended harmonic content are being used to deliver power or provide modulation, there can be some distortion in the intended output, which is quantified in terms of THD. To reduce THD, a variety of approaches have been developed. These approaches can target broad frequency ranges that contain unwanted harmonics, or these approaches can target specific harmonics to be eliminated from a system. The latter approach is used to remove harmonics in power inverters and is referred to as selective harmonic elimination (SHE). It encompasses both signal processing approaches as well as circuit-based approaches to eliminate target harmonics.

SHE and Multilevel Inverters

A look in the research literature shows that SHE is primarily used in the domain of multilevel inverters. Essentially, these systems take a DC input and convert it to an AC output via several possible topologies which use switching elements. Of course, during switching, these systems generate unwanted harmonic content, which creates the need for SHE techniques to clean up the output waveform. All multilevel inverters have problems with harmonics and thus demand a method to address this.

The waveform graph below shows how a multilevel inverter attempts to generate a sine wave by summing up successive square waves with different duty cycles and phases. These systems are called "multilevel" because they produce an AC output that consists of multiple steps, creating a waveform that more closely resembles a pure sine wave once the output is smoothed. A traditional inverter instead uses sigma-delta modulation (PWM/PFM driving) with two voltage levels to create a sine wave output.

selective harmonic elimination

Output sinusoid and stair-step waveform approximating the output in a 5-level inverter.

As more levels are added to the inverter, the output will more closely approximate a sine wave. The output can then be filtered in order to produce an approximate sine wave.

Why SHE Techniques Are Needed

The most common filter option for reducing the summed square waves to a sine wave is to use an RLC circuit filter. We would normally use an LC filter, but the additional R is needed to provide damping and thus eliminate the pole in the filter’s transfer function. If all that was required was to produce a sine wave output with no load, then a higher order filter would probably work.

The problem arises when the inverter is loaded and when a control loop is applied to the inverter. The inverter attempts to track the output such that the switching stages maintain the phase of each level in the inverter. Loading can interfere with this, and the load itself can create problems in filtering:

  • Most loads connected to an inverter will be nonlinear and will generate new harmonics

  • The use of the RLC filter will not totally eliminate harmonics from the output

  • Some loads connected to the inverter could be heavily reactive

  • Some loads connected to the inverter could be dynamic

  • The nature of the load modifies the closed-loop transfer function for the control loop

Each of these problems creates failure to suppress existing harmonic content in the inverter, or creates new harmonic content. For these reasons, researchers have worked towards many methods to suppress harmonic content on the output and closely approximate a sine wave output.

Methods for SHE

In addition to filtering as discussed above, there are two typical methods used for SHE in multilevel inverters:

  • Chopping (or gating) the drive signals so that target harmonics can be suppressed

  • Adjusting the turn-on times and durations for the driving signals in the inverter stages

Both of these approaches work best when there is real-time sensing of the output signal such that the inverter driving stages can be controlled. This would involve the closed-loop inverter topology shown below. Each of the driving stages in the topology below has its own driving signal (PWM is shown) with different duty cycle and phasing. Chopping and driver timing adjustments are implemented by the controller block through modulation of the driver signals.

selective harmonic elimination
This topology includes an output filter stage, across which the output voltage is being read and analyzed by the controller. This allows the influence of a loaded filter to be accounted for in the control algorithm.

An example showing turn-on time adjustment in a multilevel inverter is shown below. In this result, the use of static PWM driving is compared to adjusted PWM driving (SHEPWM) that attempts to target suppression of 3rd and 5th harmonics in the output waveform. The graph shows the output from the driving stage which would then be filtered to produce the desired sinusoidal voltage.

selective harmonic elimination

The SHEPWM curve implements adjusted turn-on timing for levels 2 and 3, which adjusts the harmonic content that would be leftover in the filtered output signal. (Source article: Engineering Letters)

The result from the above control method was to reduce the 3rd, 5th, and 7th harmonics. The 9th harmonic increased in the above example, but this harmonic and higher order harmonics could be attenuated with a higher-order filter.

Another approach is to use chopping of the waveform to modulate the driving PWM signal on and off for each DC level in the multilevel driving stages. An example of a chopped PWM driving waveform is shown below. Rather than having a static duty cycle as we would see in a typical PWM drive, there is a varying pulse width applied to a single DC level in the multilevel driving stage. Each of the DC levels could have its own varying pulse pattern applied, depending on the specific harmonic content that needs to be suppressed.

selective harmonic elimination

Chopping applied to one of the PWM drives in a multilevel driver stage. (Source article: IJEEI)

In both approaches, the challenge is to optimize when each of the DC levels turns on and off, and then implement this in a control algorithm. Optimization techniques are useful for addressing these types of problems.


How can we determine the optimal times and phase offsets to use in these approaches? Like any complex numerical problem, these systems can be investigated analytically by solving equations, or numerically as optimization problems. When many higher order harmonics are present, these problems quickly become intractable for hand analysis, so numerical optimization techniques need to be used to optimize the driving stages in multilevel inverters.

The optimization approach for this system is to take the phase offsets and gating times as the system’s optimization variables. The THD on the output or a figure of merit (such as a fitness function) could be used as the objective function for the optimization algorithm. The result can be minor adjustments in the driving signal and gating that produce significant changes in the output THD at specific harmonics (see the example above).

Formally, this optimization could be implemented with a variety of methods, such as:

  • Genetic algorithms

  • Particle swarm optimization

  • Gradient reduction methods

  • Adaptive directed search methods

Once active control is used to implement SHE, a secondary or tertiary filter stage could be used to eliminate all higher order harmonics. This will suppress higher order harmonics in the output but without loading down the inverter and its feedback loop within the SHE algorithm’s target frequency range. The end result is a very clean sine wave output with very low high-frequency noise.

Filtering, Chopping, and Phasing Offer a Complete Approach

As more industrial, automotive, robotic, and even aerospace systems rely more heavily on electrification, multilevel inverters and related power electronics systems will continue to see greater adoption. Techniques related to SHE may see usage in switching power systems beyond multilevel inverters.

Although the disadvantages of filtering were mentioned above, there are design techniques that focus specifically on filter design for multilevel inverter systems. For example, the LCL T-filter shown below implements a damping resistor with specific size in order to help reduce THD in multilevel inverters that are connected to the power grid. These approaches to grid-specific designs are very important for integrating renewable energy storage and solar generation systems into municipal utility grids.

selective harmonic elimination

A filter design for a grid-connected multilevel inverter. (Source article: IEEE)

Filtering accompanied by switching time optimization, phase offset optimization, and gating/chopping present a complete approach to SHE in power systems. This combined approach needs to be investigated and optimized for the specific topology and intended load being used with these systems before deployment in the field.

Circuits and techniques for SHE can be fully evaluated and simulated using the complete set of system analysis tools from Cadence. Only Cadence offers a comprehensive set of circuit, IC, and PCB design tools for any application and any level of complexity. Cadence PCB design products also integrate with a multiphysics field solver for thermal analysis, including verification of thermally sensitive chip and package designs.

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