Using Switching Activity to Measure Power Consumption of a Device
Key Takeaways

Power consumptions can typically be calculated for a single gate in a logic circuit, either by hand or with simulation tools.

When many logic circuits switch during operation, it can be challenging to calculate the power consumption directly.

If the power consumption can be dependably estimated, this number can be used in thermal simulations to assess the reliability and determine appropriate packaging.
Microprocessor power consumption in many systems is a crucial design metric
Anytime a logic circuit in a CMOS VLSI design switches states, it draws some power as transistor capacitances charge up to defined logic levels. While we would like that power draw to be as small as possible, the minuscule power draws many logic circuits to enormous dynamic power consumption during operation. While a component is being designed, it becomes essential to estimate the power dissipated by the chip as heat during operation. The goal is to determine any cooling measures, the potential need for a heatsink, whether an exposed ground pad should be included, or if special packaging is needed to ensure reliability.
Estimation techniques for integrated circuits involve examining core logic in either logic simulations or electrical simulations. A mix of the two approaches has been used to get a rough estimate of the power consumption in CMOS VLSI products by estimating the total number of logic elements contributing to total heat dissipation over a given time interval.
Estimating Switching Activity and Power Consumption of a Device
Power consumption estimates are not so simple in VLSI designs because of the structure of a modern integrated circuit. These products use multiple logic blocks, some of which operate independently and only a portion of which may be used at any given time. Although the input power carried by two different bitstreams may be identical, this does not necessarily mean the same switching activity will be produced in each case. Different bitstreams received at logical inputs will excite various switching activities in the design, resulting in diverse power consumptions.
Because the power consumption depends heavily on the input data and structure of the integrated circuit, some probabilistic methods with logic simulators must be used to determine the switching activity. The other piece of power consumption is the power drawn by a logic element during switching. The power consumption in a logic element follows a definite formula that is simply calculated:
The total power dissipated in a logic element based on drain voltage (Vdd) and switching speed
Here, C is the total capacitance being charged/discharged in a switching logic circuit. The voltage terms are the drain voltage supplied by the PDN (nominal value). The leakage current is usually neglected, although it becomes crucial in thermal simulations (see below). Note that this is reactive power: the power dissipated as heat depends on the ONstate resistance in the junction, something that can be simulated with an accurate SPICE model of transistors that make up logic elements.
While not the fastest simulation, a comprehensive method for determining average switching activity is to use a Monte Carlo simulation and analyze the results statistically. Once the average switching activity is known (e.g., the average number of logic elements drawing power per clock cycle), this number can be multiplied by the expected power consumption per logic element to get the total power consumption. A fraction of this value will dissipate as heat due to internal resistance in logic elements.
In modern microprocessors with billions of transistors, this leads to substantial heat, and designers need to perform simulations for evaluation.
What to Do With a Power Consumption Estimate
Once you have a power consumption estimate from dynamic switching, this value can be used in circuit simulations or thermal simulations with the component. The goal is to examine how the package and board characteristics affect heat transfer away from the component and into the surrounding board, air, and any heatsinks. These packagelevel simulations are beneficial for an initial reliability evaluation and could force some design changes before prototyping.
Because this happens typically during the VLSI design phase, an accurate representation of the design packaging is usually unavailable. However, this gives a design team a chance to evaluate different types of packaging to see what equilibrium temperature can be expected in various conditions. This type of reliability simulation is typically performed using a field solver, sometimes as a multiphysics problem involving airflow, or it could be a simple temperature simulation problem utilizing the heat equation.
Packaging simulations can be performed once power consumption is assessed based on expected switching activity. Designers can create worstcase scenarios and estimates of heat dissipation and temperature rise to assess product reliability.
For chip designers, these simulations are necessary before prototyping, as packaging needs to be evaluated early. Like a thermal pad on the bottom of the package, some simple packaging elements can make a big difference in terms of operating temperature. Design teams that work with the best set of systems analysis software can perform these critical tasks as part of chip design and reliability assessments in a streamlined workflow.
One crucial point to consider in VLSI design is the leakage current in a device operating at high temperature. If not designed carefully, high switching activity in core logic can increase the device’s temperature until leakage current accounts for most power dissipated as heat in the device. This increase results in the potential for thermal runaway until the chip burns out and fails. These points in reliability should be examined in simulations as they can influence the appropriate absolute maximum temperature in the device.
Using switching activity to measure power consumption of a device is easier with the complete set of system analysis tools from Cadence. VLSI designers can assess reliability for their products and implement unique packaging options as needed to accommodate power consumption and temperature rise in their designs. The complete set of simulation features in powerful field solvers integrate with circuit design and PCB layout software, creating a complete systems design package for any application and level of complexity.
Subscribe to our newsletter for the latest updates. If you’re looking to learn more about how Cadence has the solution for you, talk to us and our team of experts.