How Signal Reflection and Impedance Mismatch Are Related

Key Takeaways

• An impedance mismatch in a circuit or along a transmission line will produce a reflection back to the source of the signal.

• When a signal reflects, the power transferred downstream towards a load is reduced.

• Impedance matching provides a dual role of enabling power transfer into a load by suppressing reflections.

Whenever an electromagnetic signal travels along a transmission line, there is the possibility that it reflects from an interface between the line and a load component. The load could be anything: another transmission line section, an integrated circuit, an antenna… anything that has a clearly defined impedance. When impedances don’t match, it spells disaster for your signals, leading to an oscillatory response or a stair-step response being measured at the end of the transmission line.

Where does this effect come from and how is it solved by impedance matching? While signal reflection and impedance mismatch are related, the ringing effect that gets observed on a line is often poorly explained and can be hard to generalize. In this short article, we’ll show exactly what you can expect to see from a signal reflection due to an impedance mismatch in an interconnect.

How Signal Reflection Appears on a Terminated Line

By definition, an impedance mismatch on a transmission line causes a signal reflection; this is the case for any structure that supports wave propagation through linear media. A signal reflection causes the voltage that is read out at the receiving end of a transmission line to appear to oscillate, or it will exhibit an excessively long response that resembles steps between different levels. When a reflection occurs, the voltage and current at the input to the load component on a transmission line may exhibit overshoot or undershoot, depending on the polarity of the reflected signal compared to the incoming input signal.

The main equation that defines the strength of a reflected signal is the reflection coefficient equation. For a traveling signal reaching a load input impedance, the reflection coefficient at the load’s input is:

This typical transmission line arrangement has a reflection coefficient defined at the load end of the component. An analogous equation is defined for waves reaching the source end of the transmission line.

This equation tells us that, if the load input impedance does not match the line impedance, we have a reflection at the load. The same idea applies to the input impedance as seen at the source. After each reflection, there is a phase shift and reduction in the signal level due to continuous reflections on each end of the line.

The equation for the wave reflected from the load end of the line

In the above equation, the coefficient A is the initial amplitude of the signal on the line.

What is interesting about these two equations is that they fully describe the behavior of signal reflection from impedance mismatch as long as you know the coefficients in the above equations. Many pains are often taken to try and simulate transmission line behavior, either with 3D electromagnetic field solvers or by using equivalent lumped circuit models. In reality, you can simply graph out the input wave with its phase-shifted reflections, and you now have the waveform that would be measured at the load’s input in the time domain. This is essentially how some SPICE models will calculate the waveform measured at the load input.

For a high load impedance, the sum of reflections and the input signal seen at the load will produce a waveform that looks like the following:

Apparent oscillation due to signal reflection from a high impedance load

Why the Apparent Overdamped Response?

If you look online for resources that describe signal reflection and impedance mismatch, the overwhelming majority consider a case with a 50 Ohm transmission line connected to a high impedance load, particularly a CMOS logic circuit. Due to the reflection coefficient, we would not expect the reflected signal to be inverted. Instead, power arrives at the load only after circulating around the line. We then see the slow rise shown above at the interface between the transmission line and the load.

Signal Reflection and Impedance Mismatch at Low Impedance Loads

At low impedances, the input wave will initially invert because the reflection coefficient is less than zero. This produces apparent undershoot. Then the reflected wave will continue to circulate back and forth on the line, reflecting and inverting at each end to produce the waveform shown below. This looks a lot like an underdamped oscillation, but it is not quite the same thing. You wouldn’t expect to see this behavior on a lossless mismatched, which would not have any damping mechanism.

Apparent oscillation due to signal reflection from a low impedance load

Modern ICs that are intended to be used with transmission lines normally implement on-die termination at the driver end, and possibly at the receiver end. For something like a line driver or transceiver, you may have 50 Ohms impedance implemented at the source end of the line. The load component might not have on-die termination, which means a shunt resistor, pull-up resistor, or Thevenin termination needs to be applied.

The goal in applying these termination schemes is to set the signal at the desired level while setting the load’s input impedance equal to the line’s characteristic impedance. Before applying external termination at the load end of a line, or series termination on the source end of a low-impedance driver, check your datasheets to see if on-die termination is implemented in the component.

Cadence’s Allegro PSpice Simulator application is among the industry’s best PCB design and analysis software for circuit design and simulation. With this application, you can simulate waveforms that arrive at the load end of a transmission line to evaluate any signal reflection and impedance mismatch when designing termination networks. Cadence’s software suite can also be used to perform a range of power and signal integrity simulations and evaluate your system’s functionality before you start your physical layout.

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