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How Chip-on-Board PCBs Are Manufactured

thermocompression bonding

It’s safe to say that most PCBs we interact with, or that you find in commercial products, are built with a standard assembly process. This process involves placement of chips with standard packaging types and bonding to exposed conductor pads with solder. An alternative type of PCB involves placement of chips directly on the board, but without using a soldering process.

The assembly process in chip-on-board PCBs is known as thermocompression bonding, and it does not follow the same soldering rules as are used in reflow/wave processes. Keep reading below to learn about chip-on-board assembly, as well as the important DFM points relating to thermocompression bonding.

Chip-on-Board PCB Assembly

Chip-on-board PCBs involve placement of bare semiconductor dies directly onto a PCB; these dies are not packaged before placement and bonding to the PCB. To get these components soldered onto a chip-on-board PCB, a standard soldering process cannot be used. Instead, thermocompression bonding is used to bond contacts on the die directly to the PCB substrate. The same process is also used for wire bonding between exposed SMD pads on a PCB and a semiconductor die.

In thermocompression bonding, a probe is applied to a contact point on a dielet, and the contact point is heated up to a required temperature while pressure is applied. During the application of pressure, the exposed bumps on the bottom of the component will bond to the contact pads on the PCB. With wire bonding, the contact point is the metal wire being attached to the semiconductor die.

thermocompression bonding

Thermocompression bonding being used in wire bonding.

This process does not require printing of solder paste in a traditional reflow process. In general, a thermocompression bond in chip-on-board assembly can be much stronger than a solder joint formed through printing of solder paste and reflow soldering. It also eliminates some of the common defects that can arise in a standard soldering process, such as:

Thermocompression bonding is also preferable over flip-chip bonding with solder paste. It creates stronger bonds and is required for higher density chip-on-board assemblies. In sum, the number of process steps in thermocompression bonding can be reduced compared to reflow soldering, although the process is not necessarily simpler. Therefore, if chip-on-board assembly is to be used, there is a tradeoff between process simplicity and the strength of thermocompression bonds.

The other factor to understand in chip-on-board assembly is the availability of bare semiconductor dies. Not all components are available without packaging or lead frames, so not all components can be used in chip-on-board processing. Semiconductor dielets often need to be procured directly from the manufacturer instead of distributors; in many cases, semiconductor vendors will use chip-on-board processing for testing their products.

DFM/DFA for Chip-on-Board PCBs

There are a few important DFM points to include in your PCB layout for any chip-on-board attachment:

  • Bonding pad plating - ENIG is a typical plating material used to support chip-on-board PCBs, while higher-end boards may require hard gold plating which eliminates ferromagnetic nickel
  • Materials - Choose materials with similar CTEs between the die, substrate, and bonding pads
  • Sizing the bonding pads - The bond pads should typically follow BGA footprint guidelines for a given ball pitch.
  • Sizing the wire bonding pads - If wire bonding is being used, the land pads need to be sized such that their spacing allows room for the thermocompression bonding probe to contact only a single pad at a time.

The materials issue is most important. This is because, even during assembly, the contact points will cool and will shrink, locking in stress at the bond point between the chip and board.

Materials for Chip-on-Board Assembly

PCB materials used in chip-on-board assembly need to have low CTE mismatch to the semiconductor, but very few standard PCB materials will meet this requirement. The importance of low CTE mismatch in chip-on-board is the same as in a standard PCB: the contacts can experience excessive stress and fatigue during thermal cycling. Unfortunately, there are currently no PCB substrate materials that directly match the CTE value of silicon (~3 ppm/°C) or other semiconductor materials used to build chips.

However, some advanced PCB materials have been intentionally designed with low CTE values to better match the CTE value of silicon. For example, we have:

  • PTFE laminates with ceramic filler, such as RO3003 (CTE = 6 ppm/°C) and RO4835 (CTE = 8 ppm/°C)
  • Ceramic like aluminum nitride (CTE = 4-5 ppm/°C), which is also used as an IC substrate material
  • Flex PCBs on polyimide blends can be used to support chip-on-board assemblies
  • A silicon interposer can be used as a buffer layer between the chip and the PCB, which will decrease stress between the board and interposer/chip stack

Low-CTE organic substrate materials normally used for IC substrates are not used for PCBs, so those are typically not an option for chip-on-board assembly.

When you need to build and validate your chip-on-boad assembly options, use the complete set of IC Package Design and Analysis tools from Cadence to evaluate systems functionality. Only Cadence offers a comprehensive set of circuit, IC, and PCB design tools for any application and any level of complexity. Cadence PCB design products also integrate with a multiphysics field solver for thermal analysis, including verification of thermally sensitive chip and package designs.

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