Broad changes in chip designs, functionality, and data processing techniques on-chip are being driven by diminishing returns from process scaling. Chips are not just doing different things, their workloads are also much larger, with chip functionality demanding higher bandwidths and more features without increasing package size. This has come up repeatedly over the past two decades, and each time we start to proclaim the death of Moore’s Law, only to find the next trick that drives us to a few more technology nodes.
Chip architectures are also getting more specific to particular players in the industry. In the past, large OEMs were driving functionality demands based on their scaling abilities, or based on very needs identified within the market. Think CPUs in the early 2000s; the shift in architecture was driven by the rapid increase in compute in PCs with the goal of making everything more efficient. Anyone following Intel at the time likely remembers then-CTO Pat Gelsinger’s famous 2002 quote that chips would produce as much heat as nuclear reactors if architectures did not change.
Now, some of the largest technology companies are bringing their chip designs in-house to focus on specific data types, use cases, products, and features that enable those products. Semiconductor manufacturers are taking the modular approach or expanding foundry services in an attempt to ensure they do not lose product market share to OEMs. How are the semiconductor manufacturers building their new chip architectures to meet the flexibility demands of OEMs? We’ll examine it in this article.
Chip Architecture vs. Application Needs
The main difference in newer semiconductor architectures is a greater application specific focus. The historical challenge, however, has to do with the ASIC market and it speaks to why this application-focused transition has taken so long.
Historically, ASIC designs needed to have very broad market appeal in order to be economically viable. The upfront design and manufacturing cost increases at each new process node, reaching the point where only the highest volume applications can produce enough sales to see positive ROI on the design and manufacturing costs. For fabless companies or OEMs, the expected market penetration needed to be high enough that the cost could be passed to the customer without a huge impact on the price point.
Now OEMs have gone a step further and are vertically integrating portions of the architectural and application design process in-house.
- General-purpose compute doesn’t work so well - The needs of advanced applications with high compute density (AI, 5G, automotive) are too inefficient on general-purpose processors. These products are still used, but they aren’t the main components.
- The hardware and algorithms have to match - Some applications implement proprietary algorithms and processing in software that is too inefficient on general-purpose hardware or small ASICs. Implementing these in hardware requires a custom chip architecture.
- OEMs want to own their IP and designs - When you buy an off-the-shelf component, you don’t have any control over the design changes or the IP implemented in hardware. OEMs building for specific applications need to have control over IP to stay competitive and to bring value to stakeholders.
And so, we can see why OEMs need products that are more application-focused, but the economics of traditional semiconductor architectures and manufacturing make this prohibitive.
A Modular Approach is Making Headway
To balance out the need for customized products with powerful new capabilities, and to work within the economic constraints of semiconductor manufacturing, OEMs and semiconductor vendors are taking the heterogeneous approach with advanced packaging.
With heterogeneous integration using chiplets, systems designers can mix and match wafers from various vendors to customize the functionality they need in their chips. This changes the role of chip designers into packaging engineers rather than one of designing semiconductor dies, although OEMs could certainly package their own chiplet IP with chiplets from external vendors into a single package. The industry is currently working towards standardization in this area to help create a chiplet-based ecosystem.
Advanced semiconductor packaging for heterogeneously integrated designs gives systems designers the freedom to customize their products
For the moment, in the absence of a mature marketplace for chiplets, advanced applications are primarily being implemented with FPGAs as the main host controller, especially in development products. These systems allow instantiation of custom logic and capabilities directly in hardware, as well as offering expansive IP portfolios to use for chip development. It makes sense that FPGAs have made a comeback in high-compute applications in the absence of a custom processor.
Farther into the future, as more capabilities become accessible in chiplets in an open marketplace, OEMs may focus less on chip design and more on advanced packaging of 2.5D and 3D ICs. The chiplet and packaging design approach gives OEMs much more flexibility to build the highly customized systems they need. The same applies to design houses and semiconductor manufacturers. The chiplet ecosystem still has plenty of maturing to do before this point is reached.
Chips Are Part of a System
The big takeaway from all of this discussion about chip architectures and functionality is the realization that chips are not isolated. They are part of a system, and each element within the system has to work together. Electronics design teams now have to vertically integrate from the chip design level to the physical assembly and into the software stack.
Vertical integration in the electronics development process now spans from the die to the user-facing application.
The good news is that customization at the chip level is becoming possible alongside customization at the product level. With the right set of system analysis tools, it’s possible to build a high-level system architecture that defines chip functionality requirements alongside all peripherals in the system. This systems-level approach is what will give OEMs the ability to create the most advanced systems without cobbling together off-the-shelf parts as was done in the past.
When your team needs to design system architecture that informs a chip architecture and functional requirements, use the complete set of system analysis tools from Cadence. Only Cadence offers a comprehensive set of circuit, IC, and PCB design tools for any application and any level of complexity. For system-level simulation, users can use best-in-class electromagnetics simulations and CFD simulations to evaluate system functionality.