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Advantages of 3D Integrated Circuits and Heterogeneous Integration

Key Takeaways

  • 3D integrated circuits evolved from planar processes to create multilayer semiconductor packages with multiple feature levels.

  • There are three primary advantages of 3D integrated circuits in terms of power consumption, signal timing, and mixed-signal integration.

  • 3D integration is the foundation of heterogeneous integration, where more diverse features are incorporated into a single package.

Advantages of 3D integrated circuits

These 3D integrated circuits will make their way into high-compute processors

The advantages of 3D integrated circuits have proven themselves to the point where three-dimensional structures are used in modern chips. Today’s integrated circuits span three dimensions to provide the feature density and interconnect density required in modern high-compute devices. As more designs integrate broad functionality and require an array of different features, 3D integration will converge with heterogeneous integration, where diverse chip designs are packed into a single package. This guide gives an overview of the advantages of 3D integrated circuits and how they enable heterogeneous integration for future advanced devices.

Advantages of 3D Integrated Circuits

The general structure of a 3D integrated circuit in VLSI design is relatively simple, as displayed in the graphic below. In this type of system, an integrated circuit is constructed by stacking feature layers on top of each other. By stacking individual die/wafer layers vertically, the length of the connection required to route an electrical signal between two circuits is shorter. This shorter interconnect provides the advantages of 3D integrated circuits.

Structure of 3D integrated circuits [Source: ARM]

There are four advantages of 3D integrated circuits:

Lower Power Consumption

Lower power consumption has motivated smaller package sizes, and novel interconnect designs since the late 1990s. At some point, the only way to get to smaller package sizes in an integrated circuit was to stack the design in 3D. The smaller interconnect length allows for reduced power consumption due to lower DC resistive losses over the length of an interconnect. This is important as designs have scaled to smaller technology nodes, requiring thinner interconnects with larger DC resistance.

Faster Signal Transitions

Because shorter interconnects are used in these designs, the total capacitance of a vertical interconnect is smaller than a horizontal interconnect. This means signals in interconnects will see a lower RC time constant and make faster transitions between ON and OFF states. Additionally, there is a lower signal delay on an interconnect as the total parasitic capacitance is lower, ensuring faster propagation of switching from inputs to outputs. These factors enable higher serial data rates with digital signals.

Analog and Digital Integration

3D integration enables the integration of analog and digital circuit blocks into the same package with fewer signal integrity concerns and without significantly increasing the package size. In these packages, the digital and analog blocks can be separated in a planar arrangement. Still, more features can be added to each block vertically without unduly increasing the package size. By isolating blocks into their regions, crosstalk and noise coupling is easier to control and will not create major signal problems in these designs.

Space Savings

Finally, the most obvious benefit is space savings as package sizes are smaller.  Vertically stacked 3D integrated circuits can be kept very thin, which is advantageous compared to spreading circuit blocks out over the expanse of a semiconductor die. As a result, more components and features can be packed onto a PCB to enable higher-density designs with advanced packages.

Although these packages have many practical and signal integrity advantages, simulation tools are needed to ensure designs operate as intended. At the circuit level, reliability is assessed with SPICE simulations, while physical layout and package level simulations are performed with a field solver application. Advanced packaging should be treated using a multiphysics approach to assess thermal reliability. Integrated circuit designers can ideally identify packaging problems before prototyping and make design modifications early.

Future Opportunities in Heterogeneous Integration

In 2019, the Heterogeneous Integration Roadmap (HIR) was released with three IEEE societies (Electronics Packaging Society, Photonics Society, and Electron Devices Society). This roadmap specifies performance benchmarks for heterogeneously integrated systems, where multiple circuits and devices are integrated into a single semiconductor package. These designs are true systems-in-package (SiPs), where multiple semiconductor die components are integrated into the same package.

 Microprocessor switching activity power consumption

The heterogeneous architecture used in AMD’s Fiji GPU

 [Source: Design007, October 2020 Issue]

This new modality in IC design looks like what PCB designers do on their boards. These components already take advantage of 3D integration, where multiple 3D integrated circuits are combined and connected into the same package. IC designers can take a more modular approach to semiconductor design by integrating multiple components on different dice into the same package with a silicon interposer, glass substrate, or on a wafer as a monolithic integrated circuit. 

The major advance that enables this module and feature integration is the through-silicon via (TSV). Some of the first components to implement chip stacking with TSV on interposers were CMOS imaging sensors. TSVs were used to form interconnects through an interposer layer on the sensor to provide connections to on-chip readout circuitry. Similar packaging can be used in high-compute processors; the first example was AMD’s Fiji GPU (see above), released in 2017 and used a TSV interposer to integrate memory and a graphics processor in a single package.

This type of integration is expected to continue as packaging becomes more advanced. Chiplets, die-wafer/die-die structures, and multi-chip modules are manifestations of 3D integration and greater feature density in modern integrated circuits.

Designers that want to develop more advanced components for specialized applications will continue taking a 3D design approach with heterogeneous integration. If you want to see all the advantages of 3D integrated circuits in your design, use Cadence’s complete set of design and analysis tools. VLSI designers can integrate multiple feature blocks into new designs and define connections for continued integration and scaling. The complete set of simulation features in powerful field solvers integrate with circuit design and PCB layout software, creating a whole systems design package for any application and level of complexity. 

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