Understanding PDN Impedance and Stable Power Delivery

Key Takeaways

• All PCB designs require near-zero PDN impedance to ensure stable power delivery and low power loss.

• PDN impedance is affected by many factors, including structure and parasitics in the various circuit elements.

• PDN impedance can be evaluated from two perspectives: field solvers and circuit simulators.

This bank of capacitors is an important part of the PDN impedance

Every PDN has impedance, both resistive and capacitive components. Unlike the common circuit elements, there is no specific formula that can be used to calculate the impedance of a PDN. The system is simply too complicated and cannot be treated with closed-form equations. Although the PDN impedance is difficult to calculate and can’t be generated from most PCB design applications, it is very important to ensure low PDN impedance in many digital systems.

Although you might not realize this until you fail EMC tests or notice a peripheral failure during operation, simple devices can exhibit the same kinds of power integrity problems as highly specialized fast digital circuits. The problem arises due to the rise time for signals in these systems, rather than being related to the clock frequency or DC resistance. The best design tools can help you understand how things like plane arrangements and decoupling capacitors affect PDN impedance as you work to verify your design.

What Is PDN Impedance?

Every electronic system has a PDN, which stands for “power delivery network”. It’s basically every element that is connected to the voltage and ground rail, including the power and ground plane arrangement, any buses that connect from planes to groups of components, decoupling capacitors used for power stability, and any other copper features that connect or couple to the main power rails in the design. Parasitics also make up the PDN impedance, such as parasitic capacitance and inductance in any connections to ICs.

In particular, there are a few parasitic elements that are very important in determining the impedance of the PDN:

• Plane capacitance - the capacitance between plane layers in the PDN.
• Capacitor inductance - the leads on capacitors have some parasitic inductance, causing them to have a self-resonance.
• Trace inductance - traces that bring power to components also contribute some inductance to the PDN.

In addition to parasitic elements, capacitors are used on a DC PDN to help stabilize power by shunting high frequency noise currents to ground. Unfortunately, capacitors do not act like the theoretically perfect capacitors you find in textbooks, and they have the parasitic inductance mentioned above. These effects matter when we consider the transient response of the PDN to a pulse of current being drawn into the system by a load component on a power bus.

Effects on Power Stability

When the PDN is excited with a current pulse, the resulting transient voltage response is determined using the inverse Fourier transform of Ohm’s law: 

From Ohm’s law, we can see that any transient voltage response is only minimized if we can also minimize the PDN impedance over the broadest possible bandwidth.

The resulting waveform can be quite complicated. Why would we have a transient response at all? This is because the PDN impedance is non-zero and has a complex resonance structure in the frequency domain, as shown below.

Relation between PDN impedance (left) and voltage fluctuations due to a current pulse

Effects on All Other Ports

The current drawn into the PDN by one component and the subsequent transient voltage disruption seen on the PDN gets mirrored to all other ports on the PDN according to Kirchhoff’s voltage law. In particular, the current that is drawn into the PDN is modeled as a voltage spike that is generated by the inductance in the PDN. The result is that the transient voltage is seen at all other ports on the power bus, creating power stability problems in other areas of the PCB.

The transient voltage disturbance created from switching at Load 1 is mirrored onto other loads

The above equation for the PDN impedance is defined for a single-port PDN. Real PDNs have multiple ports, as shown in the above power diagram. In order to determine the impedance of a real PDN, we need some way to link the PDN impedance to the physical layout in the PCB.

Calculating PDN Impedance

Although it may sound simple to calculate the impedance of a PDN, there is no single equation that can be used to calculate the impedance of the PDN in a PCB based on geometry and material properties. The real structure of any PDN, even simple cases with adjacent planes, is too complex to admit closed-form solutions that are not approximations. When it comes time to evaluate a design board and verify there is low PDN impedance, there are two types of simulation tools available: field solvers and circuit simulators.

The Role of Field Solvers

A field solver does not take into account any of the circuitual characteristics of parasitics in the PDN. Instead, a field solver enforces boundary conditions on the electromagnetic field and solves Maxwell’s equations directly. From these results, it is possible to calculate the Z-parameter matrix for the structure of the PDN, which will tell you everything you need to know about the impedance of a possibly multi-port PDN:

• Self-impedance: This could also be called characteristic impedance. This measures the power disturbance seen at a port in a PDN due to current draw into the same port.
• Transfer-impedance: This is the impedance that defines how current drawn into one port creates a voltage disturbance at all other ports in the PDN.

Because real PDNs have multiple outputs on a power bus, the correct formulation of PDN impedance is in terms of an impedance matrix using Z-parameters:

Definition of PDN impedance in terms of a Z-parameter matrix for an N-port network. The diagonal term is the self-impedance for each port in the network and the off-diagonal terms are transfer impedances

A 3D electromagnetic field solver application that takes data directly from your PCB layout can be used to solve this problem and determine the PDN impedance matrix shown above. This type of simulation is the fastest way to calculate the impedance of a complex PDN, possibly with multiple power buses and branches, but it is unwieldy when you need to design decoupling networks for the PDN.

The Role of Circuit Simulations

Due to the complex nature of a real PDN, circuit simulations cannot account for parasitics in a PDN impedance calculation unless placed as equivalent circuit elements. However, you can simulate the impedance spectrum created by a series of decoupling capacitors added to the PDN to provide stable DC voltage. With a SPICE simulation engine built into your schematic design tools, you can run parameter sweeps on a capacitor network that includes parasitic inductances in the capacitor models. Your goal is to sweep through different values and numbers of capacitors in order to determine the best arrangement of capacitors that minimizes the PDN impedance. 

When you need to calculate PDN impedance in your design and calculate transient responses in your physical layout, use the front-end design software from Cadence to create your circuit schematics and access simulation tools. The PSpice Simulator application includes an array of circuit simulation features that are ideal for advanced electronics with an advanced SPICE engine. You’ll have a complete set of tools for creating and simulating circuits with parameter sweeps, signal integrity simulations, and much more.

If you’re looking to learn more about how Cadence has the solution for you, talk to us and our team of experts.