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Overview of the IEEE IP-XACT Standard


Whether you work in circuit board design, semiconductor design, or software development, your organization will have a set of IP that needs to be tracked, secured, and handed off to production. Fabless semiconductor companies increasingly rely on development and transfer of silicon IP to streamline their design and production operations. Like other areas of hardware development, standards can aid the transfer of IP to vendors and manufacturers, as well as integration of third party IP to accommodate the escalating complexities of chip design.

IEEE IP-XACT is one standard that provides a standardized data structure for semiconductor IP and aids transfer of IP to manufacturers, 3rd parties, and customers. IP transfer in a standardized format streamlines integration of technology and the transition to volume manufacturing for new products. The standard may be a big driver of chiplet production, integration into advanced manufacturing, and reduced time to market for advanced products.

IP Matters in Modern Chip Design

Modern heterogeneously integrated products, advanced SoCs with vendor IP, and IP licensing have all seen significant growth in semiconductor design and manufacturing. Although the design and integration of diverse IP into a single product ought to follow well-defined rules based on electrical interfaces and design rules, inconsistent data formats make this integration complicated.

Prior to industry standardization of IP in chip design, the integration of diverse IP into new products was time-consuming and could result in design errors. Challenges include:

  • Difficulty in building consistent testbenches for verification
  • Incorrect interfaces developed between diverse IP
  • Design errors that propagate into prototypes
  • Longer time to market

The current revision of the IP-XACT standard (also known as IEEE Std. 1685-2022) aims to overcome these challenges by standardizing the data format used to describe semiconductor IP. The standard is developed using XML schema, making it tool-independent and interoperable. As new features and data need to be standardized across chip designs, the dataset can be extended without losing compatibility. The newest revision was released in 2022, and the features in the standard are available in semiconductor design and verification software.

New Features in IP-XACT

The new data features supported by the most recent IEEE Std. 1685-2022 include:

  • Descriptions of HDL and SystemVerilog interfaces
  • Descriptions of analog and mixed-signal properties in ports for mixed-signal netlisting
  • Power domain descriptions and binding of power domains
  • Descriptions of runtime configurable component model parameters
  • Parameterized register definitions and register instances

These important aspects of chip design extend into verification for advanced products that leverage diverse IP blocks.

IP Transfer For Verification

As part of design verification, IP is used to develop testbenches, but this requires specific expertise or firsthand knowledge of the IP. The IP-XACT standard can help streamline this transition to verification by standardizing the workflow for developing a verification environment. The use of a standardized data format for IP transfer allows a unified testbench to be built for diverse IP so that there is a consistent verification flow and view. This means any errors in IP integration within the product’s design data can be caught before prototyping, which ultimately reduces development costs.

Software Support For IP-XACT

Today, semiconductor software vendors are using the IP-XACT standard for IP development, transfer, and integration. The IP-XACT standard helps automate many aspects of SoC assembly, IP reuse, and IP integration from third parties. The standard is very flexible and it can be used alongside legacy IP that is not standardized in a design reuse process through simplified integration.

Today, commercial design applications are available that will guide designers through an IP-based system configuration flow, which includes legacy IP in a single product. Designers can create develop and package a complete subsystem for reuse, which is important for heterogeneously integrated products and SoCs.

IP-XACT design reuse

The most recent changes in IP-XACT are more than just technical updates, they enable workflows that support chip designers and verification engineers as they build more advanced and integrated products. Given the demand for more powerful semiconductors to support advanced application areas, the industry needs standards like IP-XACT to keep pace with the increasing complexity of these devices and their complexities in semiconductor manufacturing. This fits with a related trend in systems design and PCB design, where standardized data structures can enable more efficient handoff of data to production.

Today’s complex devices will continue to make use of third party IP, heterogenous integration, and more advanced packaging techniques. Make sure you qualify your most advanced designs using the complete set of system analysis tools from Cadence. Only Cadence offers a comprehensive set of circuit, IC, and PCB design tools for any application and any level of complexity. Cadence PCB design products also integrate with a multiphysics field solver for thermal analysis, including verification of thermally sensitive chip and package designs.

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