How Dynamic Voltage and Frequency Scaling Affects Power Consumption

April 29, 2021

Cadence System Analysis

Key Takeaways

There are many techniques for reducing power consumption in a CPU or GPU that focus on the software/firmware level, system level, and transistor architecture level.
Two techniques for reducing power consumption are dynamic voltage and frequency scaling, where the supply level, signal level, and clock frequency are scaled to respond to power demands.
Dynamic voltage and frequency scaling techniques must be implemented at the hardware level as part of low-power VLSI.

High speed processors use dynamic voltage and frequency scaling to modulate power consumption

Today’s CPUs now process more data than ever before, thanks to scaling from Moore’s law and greater demand for more advanced applications. In about the year 2000, Intel predicted that CPU scaling, if extrapolated linearly, would eventually increase the total power consumption until it exceeded the total power output from the sun. At that time, CPU power reduction methods and low-power architectures became a major focus by CPU designers and manufacturers, and this trend continues today.

Low power CPU, GPU, FPGA, and MCU design methods are focused in three areas:

Low-power architectures: Transistor structures have been redesigned and miniaturized through scaling so that they can run at lower voltages and consume less power.
Software and firmware: Core algorithms in software and firmware have been optimized to reduce the number of instructions required to complete a given task, which reduces the total power consumed per task.
Throttling and sleep modes: Processor cores can be put into a “sleep mode”, which effectively shuts off the processor until it receives some wakeup signal at one of its inputs.

Among these, the final area is probably most prominent for systems designers who start reading component datasheets. Dynamic voltage and frequency scaling is a primary methodology used to throttle clock frequencies and control power consumed in complex processors. If you’re new to this area and need to know how it affects your designs, keep reading to learn more.

How Dynamic Voltage and Frequency Scaling Work

Today’s modern digital components are built from MOSFET-based circuits that are dominantly produced using CMOS processes, although TTL, ECL, NMOS, and BiCMOS logic families can still be found in commercially available components. All MOSFET-based digital logic circuits use a voltage level to represent logical state, and the logic level must sit with some range of values to represent a 1 or 0 in binary logic. This voltage is set depending on the power supply level given to the digital component.

In processors, we have multiple blocks that perform different functions involved in processing and moving digital data. These include:

Cache: All CPUs have some on-board high-speed memory, where programming instructions can be stored and retrieved.
Control unit: The control unit takes digital data from inputs and program instructions from memory and gives these to other blocks in the CPU. Similarly, it takes data from other blocks and sends it to outputs and peripherals.
Arithmetic logic unit (ALU): This portion of the CPU performs simple arithmetic operations. In digital arithmetic, all complex mathematical operations are broken down into simple arithmetic operations that can be implemented in the ALU.

CPU block diagram

Finally, there is a core that receives and executes instructions provided by the control unit. Modern CPUs may have multiple cores (in powers of 2), which allows application parallelization. Each core executes certain data operations with input data and logical instructions provided by the control unit. The core and individual logic units are two places where dynamic voltage and frequency scaling are applied to reduce total power consumption.

Voltage Levels at Transistors in Logic Units

Transistors switch between high and low voltage levels during operation. Although we like to think of transistors as being perfect components, they have unintended parasitics that determine how they switch during operation. The image below shows an equivalent circuit diagram for a MOSFET with parasitics included.

Power consumption and dynamic voltage frequency scaling

Equivalent MOSFET model with parasitic capacitances between input elements

Here, we have a delta circuit involving three capacitances in parallel with a rectifying semiconductor element. The capacitances at each node are entirely unintentional and arise due to the compact nature of modern MOSFETs. These parasitic capacitance values arise from the structure of wires in an integrated circuit, known as coupling capacitance. Note that we haven’t included inductance on the leads, as it is negligible in small transistors.

When a MOSFET in a logic circuit is switched, the capacitance charge is flowing into the above circuit to charge/discharge these capacitances. The total equivalent capacitance then determines how long it takes for the MOSFET to switch states (i.e., just like in an RC circuit). The power consumed during switching is:

MOSFET switching dynamic voltage frequency scaling

Power required for switching a MOSFET

From this equation, we see that transistors can be run at lower voltage to reduce power consumption. The capacitances on a silicon die are nonlinear, with capacitance being roughly inversely proportional to the supply voltage. By running at lower voltage, we also increase the switching time, which then shifts the switching signal’s power spectrum to lower frequencies.

Clock Frequency

The core of a CPU contains a clock, which will run at a particular multiple of some frequency generated by a highly stable reference oscillator (such as a crystal). A phase-locked loop (PLL) is used to generate one or more faster or slower clocks from this reference clock. By throttling back the clock speed, the switching rate for transistors is slower, which also reduces the power consumed by the CPU. If the core voltage is not changed, then the power consumed per clock cycle is unchanged, but the total power consumed over a given time interval is low.

Optimize Operating Modes in Your Design Software

Dynamic voltage and frequency scaling can be implemented in low-power VLSI using a set of standard design libraries in IC design software. Although the time required to reach design closure is higher and the product becomes more complex, the investment is worth the power savings. Designers who want to implement dynamic voltage and frequency scaling in their products need to consider operational modes that will be needed and determine which core features to turn off during operation.

With the best VLSI design software, systems analysis tools, and circuit simulators, designers can minimize power consumption across the system, not just in the CPU core. When you need to design, simulate, and layout ICs while implementing dynamic voltage and frequency scaling, use the set of system analysis tools from Cadence. Only Cadence offers a comprehensive set of circuit, IC, and PCB design tools for any application and any level of complexity.

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