Skip to main content

All Systems Go! Signal Integrity Signoff of 3D-IC Systems

3D-ICs meet the demand for integration of disaggregated system-on-chip (SoC) architecture built from multiple chiplets and heterogeneous architectures such as analog, digital, optoelectronics, and non-volatile memory. They provide improved performance and area, low power consumption due to short interconnection length, and reduced signal delay. We can broadly classify 3D-ICs as transistor-level 3D integration, system-in-package (SiP) and system-on-package (SoP), and wafer-level through-silicon vias (TSV)-based 3D integration.

To read the full article, click here