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Understanding Simulation Analysis Parameters for DDR4 Bus Systems in SystemSI

Demonstrating the step-by-step process of setting timing budget, jitter and several other parameters in the analysis options form, before simulating a DDR4 interface of a layout file, using the SystemSI-PBA tool, followed by the definition and purpose of these parameters plus components of total jitter to understand the jitter injection parameters for the signal integrity performance analysis of a DDR4 bus system.

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