AWR Datasheets

RF to mmWave Design for Systems 2 www.cadence.com design elements of electronic systems. At the core of this strategy is design excellence, including an optimized EDA portfolio of tools with best-in-class RF, microwave, and mmWave circuit, system, and EM analysis, IP for semicon- ductor, package, and PCB design, and scalable access in the cloud. The V16 Advantage Advanced integration methodologies result in smaller and more efficient systems. However, these highly integrated systems are more complicated and prone to error due to the interdependencies of the individual components, the complex network of cross-fabric interconnects, and the challenges of assembling cross-platform design data from multiple sources. To address these design obstacles, AWR Design Environment V16 provides an enhanced platform for developing MMIC and RF PCB IP (Figure 2). Design teams can incorporate their MMIC and RF PCB IP into electronic systems composed of ICs and interposers, PCBs, and modules from a wide array of process technologies through proven capabilities in Cadence's EDA software portfolio, including Allegro PCB Designer for PCBs and SiPs, and the Virtuoso platform for RFICs and modules. f Powerful - Turn concepts into real RF/microwave components, optimized for performance and ready for easy integration into multi-fabric systems that are right the first time f Insightful - Capture true RF system performance with tightly coupled EM and thermal analysis for solving large, complex structures and heat-generating RF power applications f Connected - Embeddable and re-usable Microwave Office software ushers in a new era of unprecedented cross-platform workflows to Allegro and Virtuoso platforms for chip, package, board, and module design Highlights Platform Interoperability Leveraging shared architecture/data across Cadence EDA solutions, the V16 release provides for new RF workflows that take completed IP design from Microwave Office software and pass both the schematic and layout designs to the Virtuoso and/or Allegro platforms as data in a unified library that contains all the building blocks of the circuit design. This enables design teams to operate the Allegro SiP or Virtuoso SiP bi-directional implementation flow and Virtuoso RF Solution physical implementation flow as the primary layout tool, with the AWR Design Environment software providing the RF IP schematic/layout design data. The Virtuoso RF Solution flow captures Microwave Office RF IP, allowing designers to represent, integrate, and verify the MMIC and embedded RF package design within a single environment. The shared database enables more practical package and IC co-design by simplifying the design flow with easy and reliable access to RF IP developed within Microwave Office software. Microwave Office/Virtuoso Workflow Export IP generated from Microwave Office software and implement it as MMIC or package/laminate technologies into Virtuoso Schematic Editor and/or Virtuoso Layout Suite to integrate these designs into multi-technology systems. The new interoperability eliminates the need for manual design re-entry, reducing time, costs, and the potential for errors. Schematic and layout sourced from Microwave Office software will have the same look and feel in the Virtuoso environment as the original design (Figure 3). Since most MMIC model and PCell libraries are defined and implemented by the III-V foundry as a process design kit (PDK), the Microwave Office MMIC design flow still utilizes this PDK for the target semiconductor process in the design. Figure 2: Adaptive mesh of stacked MMIC die in package on PCB structure Microwave Office Virtuoso Figure 3. Microwave Office software's 2-stage MMIC design (schematic/layout) integrated into the Virtuoso environment

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