AWR Software for the Design of a High-Efficiency Broadband GaN HEMT Doherty Amplifier for Cellular Transmitters
6 www.cadence.com/go/awr
In this case, the device output capacitance and bondwire inductor constitute a low-pass L-type matching section to increase
the load impedance at higher harmonics (second and above) seen internally by the device at the current source. Figure 8
shows the simulation results for the small-signal S
11
and S
21
parameters versus frequency, demonstrating the bandwidth
capability of a modified inverted transmission-line GaN HEMT Doherty amplifier covering a frequency range of 1.6-3.0GHz
with a power gain over 11dB.
Figure 8: Simulated small-signal S-parameters versus frequency
Figure 9 shows the simulated large-signal power gain and drain efficiency of a transmission-line GaN HEMT tri-band inverted
Doherty amplifier based on a 20mil RO4350 substrate, with the carrier gate bias V
gc
= −2.5V, peaking gate bias V
gp
= −5.5V, and
dc supply voltage V
dd
= 50V. An output power of more than 53dBm and a linear power gain of more than 10dB were achieved
across the entire frequency range of 1.8-2.7GHz. At the same time, the drain efficiencies of more than 50 percent at saturation
and 7dB backoff output powers were simulated at frequencies of 1.85GHz, 2.15GHz, and 2.65GHz, respectively, with maximum
drain efficiency of more than 70 percent at peak power of 52.5dBm and lower band frequency. The drain efficiency levels were
above 50 percent over the entire frequency range when this power level was reduced to ~46dBm (the maximum back-off
output powers of around 6dB).
Figure 9: Simulated power gain and drain efficiency of broadband two-stage inverted Doherty amplifier
The test board of a 1.8-2.7GHz inverted Doherty amplifier based on two 80W GaN HEMT power transistors with internal input
matching in metal-ceramic flange packages was fabricated on a 20mil RO4350 substrate to cover three key frequencies in
the mobile/cellular bands. A broadband 90-degree hybrid coupler from Anaren model X3C17A1-03WS provides the input
power split with a maximum phase balance of ±5 degrees and amplitude balance of ±0.5dB across the frequency range of
690-2700MHz. The input matching circuit, output load network, and gate and drain bias circuits (having bypass capacitors on
their ends) are fully based on microstrip lines of different electrical lengths and characteristic impedances.
