AWR Application Notes

AWR Software for the Design of a High-Efficiency Broadband GaN HEMT Doherty Amplifier for Cellular Transmitters 4 www.cadence.com/go/awr Broadband Two-Stage Inverted Doherty Amplifier Figure 4 shows the schematic diagram of an inverted broadband Doherty amplifier configuration with an impedance transformer based on a quarter-wave line connected to the output of the peaking amplifier. Such an architecture can be very helpful if, in a low-power region, it is easier to provide a short circuit rather than an open circuit at the output of the peaking amplifier, which depends on the characteristic of the transistor, specifically the C ds of the transistor model, which is periphery (size) dependent. The larger the transistor periphery, the more power it is capable of delivering and the higher the C ds value. C ds is also frequency dependent, which will impact the impedance matching criteria for broadband PAs. 9 In this case, a quarter-wave line is used to transform very low output impedance after the phase offset line to high impedance seen from the load junction. In particular, by taking the device package parasitic elements of the peaking amplifier into account, an optimized output matching circuit and a proper phase-offset line can be designed to maximize the output power from the peaking device in a high-power region and approximate a short-circuit termination in a low-power region. 10 Figure 4: Block schematic of two-stage broadband inverted Doherty amplifier To better understand the operation principle of an inverted Doherty amplifier, consider separately the load network shown in Figure 5a, where the peaking amplifier is turned off. In a low-power region, the phase adjustment of the offset line with electrical length θ causes the peaking amplifier to be short-circuited (ideally equal to 0ohms). The matching circuit in conjunction with phase offset line provides the required impedance transformation from 25ohms to the high output impedance Z out seen by the carrier device output at the 6dB power backoff (ideally equal to 100ohms with the quarter-wave transformer), as shown in Figure 5b. Figure 5: Load-network schematic and impedances In this case, the short circuit at the end of the quarter-wave line transforms to the open circuit at its input so that it prevents power leakage to the peaking path when the peaking transistor is turned off. In a high-power region, both carrier and peaking amplifiers are operated in a 50ohm environment in parallel, and the output quarter-wave line with the characteristic impedance of 35.3ohms transforms the resulting 25ohms to the required 50ohm load. Based on this configuration, the broadband inverted GaN HEMT Doherty amplifier was designed with average drain efficiency of 47 percent, average output power of 38dBm, and saturated power of 44dBm with a power gain of more than 11dB operating across the frequency range of 1.8-2.7GHz using two 10W Cree GaN HEMT power transistors CGH40010P. 7, 11 Note: in a symmetrical Doherty amplifier, the dynamic range for maximum efficiency is 6dB. Therefore, maximum efficiency begins at 6dB from saturated power (in this case, at 38dBm). a) b)

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