Addressing 5G and MIMO Design with Circuit/Antenna In-Situ Simulations with AWR Software
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Figure 4 shows the 3D view of the MMIC amplifier. It is a two-stage, 8-FET amplifier designed to work at X-band.
Figure 4: 3D layout view of the designed MMIC amplifier
In this example, the feed network is simulated entirely in the circuit simulator. A more realistic example would simulate the
layout of the feed network in an EM simulator to make sure the models are accurate and there is no unintended coupling
between sections of the network.
Typical circuit simulation results are shown in Figure 5. The system is designed to work at 10GHz. The purple curve shows the
input impedance for an isolated patch from 6 to 14GHz on a 50Ω normalized Smith chart. The marker shows the normalized
impedance at 10GHz. The four crosses show the input impedance of four typical elements at 10GHz. Note that the interaction
between the elements in the array shifts the input impedance of each element from that of an isolated patch. The green
contours are load-pull simulations for the MMIC amplifier, showing the power delivered to a load. The shifting of the imped-
ances of the antenna feed results in a 0.5dB degradation of power to the elements. (The power contours in Figure 5 are in
0.5dB increments.)
Figure 5: Circuit simulation results show the array active impedance HPA load pull
