AWR Application Notes

Addressing 5G and MIMO Design with Circuit/ Antenna In-Situ Simulations

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Addressing 5G and MIMO Design with Circuit/Antenna In-Situ Simulations with AWR Software 2 www.cadence.com/go/awr Patch Microstrip Array Optimized Using AWR Microwave Office In this example, a 4X4 patch array that is driven by a corporate feed network with a phase shifter and attenuator at each element is simulated. A microwave monolithic integrated circuit (MMIC) power amplifier (PA) is placed at each element before its corresponding phase shifter. The array is only simulated once in the EM simulator. The resulting S-parameters are then used by the circuit simulator, which also includes the feed network and amplifiers. As the phase shifters are tuned over their values, the antenna's beam is steered. At the same time, each amplifier sees the changing impedance at the antenna input it is attached to, which affects the amplifier's performance. The PAs are nonlinear, designed to operate at their 1dB compression point (P1dB) for maximum efficiency. They are therefore sensitive to the changing load impedances presented by the array. The combined circuit and EM simulations are necessary for a number of reasons. First, the EM simulation is necessary because the antenna elements interact with each other, which can significantly degrade the antenna's performance. An extreme example of this is scan blindness, where the interaction between the elements causes no radiation to occur at certain scan angles. The coupling between the elements can also lead to resonances in the feed network. In order to optimize the feed network to account for deficiencies in the antenna, the entire array combined with the entire circuit must be optimized. It is critical to simulate the feed network itself since resonances can build up due to the loading at the antenna ports. Another important point, but often neglected, is that the PA driving the antenna requires a nonlinear circuit simulation. It is therefore important that the antenna's S-parameters include a DC simulation point and values at the various harmonics used in the harmonic balance simulation. Otherwise it is possible to have unpredicted degradations in system performance due to poor matching at the harmonic frequencies or inaccurately specified DC biasing. Figure 1 shows the 4X4 patch antenna array. Each patch is fed individually by a pin going to the ground below. The port is placed at the bottom of the pin. AWR AXIEM software, which is used for the planar EM simulations, has the ability to ground a port with a metal strap, which is used as the pin. This type of simulator is ideal for planar patch arrays that may require a 3DEM simulator depending on the structure details, since the patch is not in a package and radiation effects are therefore included automatically. Figure 1: A 4X4 patch array (left) and the mesh of one element and the driving pin to the ground plane(right)

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