Design of a 10GHz LNA for Amateur Radio Operation Using AWR Software
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Design Approach
The LNA design utilized FETs operating with 15 to 20mA drain current. In order to gain insight into the stability tradeoffs in the
LNA, it was worthwhile looking at inherent stability behavior of these FETs. As can be seen in Figure 1, the plots suggest that
series loss at the input and shunt loss at the output will enhance stability. Initially, a single-stage amplifier was designed as a
building block in a two-stage amplifier. The actual interstage RF circuit was a cascade of an output network from Stage 1 and
the input network from Stage 2 with a phase rotation line inserted between them. This was used to tune the overall
two-stage stability performance.
Figure 1: pHEMT stability regions and conjugate port impedances
The overall amplifier schematic is shown in Figure 2. Gate and drain bias networks comprise a high impedance ¼λ line that
was terminated by a low impedance, bypassed, DC feed circuit. A low impedance (near short circuit) for in-band frequencies
was provided by an open-circuit ¼λ radial stub. The DC feed path is also decoupled and damped by series resistance.
The +12V DC input was first dropped to a regulated 3.3V rail, followed by a 2.5V regulator. The 3.3V rail fed the collector of two
emitter follower pass transistors for drain supply of the two LNA FETs. The 3.3V rail also powered the negative voltage
generator integrated circuit (IC) (MAX1044) for the LNA FET gate bias. The 2.5V regulator provided a base reference voltage
for the emitter followers. At turn on, the rise in base voltage was delayed by an RC circuit to sequence the gate negative
supply before the drain positive supply. The emitter followers also provided supply path isolation between RF stages.
Figure 2: Two-stage 10GHz LNA schematic
