AWR Success Stories

Arralis and Cadence Cadence is a pivotal leader in electronic design and computational expertise, using its Intelligent System Design strategy to turn design concepts into reality. Cadence customers are the world's most creative and innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications. www.cadence.com © 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo, and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners. 15642 12/20 DB/SA/SS-M-ARLS/PDF The success of the bare die MMIC has fueled the subse- quent development of a packaged part that will facilitate a more convenient solution for system integration. The Kyocera SGMR-B1193, a commercially available 7 x 7mm ceramic quad-flat no-leads (QFN) package, was selected for investigation, as shown in Figure 3. Figure 3: Proposed packaging (Kyocera SGMR-B1193) for K-band HPA. Image courtesy of Kyocera Corporation This package will provide a hermetically sealed solution with enough space to accommodate the die and decou- pling capacitors, while also minimizing the RF I/O bond-wire length. A coefficient of thermal expansion (CTE)-matched molybdenum copper (MoCu) heat sink will provide a reliable thermal path through the base. The ceramic QFN package is a compact size of 7 x 7mm. This RF transition was simulated using the AWR Analyst EM simulator (Figure 4) to minimize return loss due to impedance mismatches between the MMIC, the package, and the evalu- ation board. The simulation results show a well-matched transition with insertion loss of 0.25dB. This will translate to an overall gain reduction of 0.5dB and power reduction of 0.25dB for the packaged part compared to bare die option. Figure 4: Details of package model I/O port simulation setup (left) and resulting mesh in AWR Analyst software (right) Conclusion Arralis engineers successfully designed a K/Ka-band chipset, inclusive of a 10W saturated output power HPA, for satellite communications applications. The three-stage MMIC amplifier, fabricated with space-qualified, 0.25μm GaN on SiC, was developed using state-of-the-art semiconductor technology, foundry-qualified device models, and AWR software circuit/EM simulation technology. Transceiver architectures for both uplink and downlink communications were demonstrated with this chipset and the integrated HPA. Additional development efforts are focused on integrating the bare die into a suitable package with initial samples of the packaged HPA.

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