SUCCESS STORY
Key Challenges
To create this hybrid discrete power amplifier (PA), Qorvo
wanted to provide a highly broadband solution that was
inexpensive and had a small footprint, but this made
implementing multiple stages a difficult task given size
constraints. The designer chose to use a bridged T
topology because it allowed him to match the input of a
single transistor to 50Ω while minimizing die area. The
packaged amplifier needed to demonstrate 5W of output
power and 40-50% power-added efficiency (PAE) across
the 1 – 2.7GHz range.
The transistor was sized such that the 50Ω termination on
the output matches well to its target load line, so that the
output can be left unmatched. A transistor with 1.24mm
periphery was chosen, and, additionally, a transistor with
2.48mm periphery was also designed, which provides a
favorable load line and similar die area, but was not used in
this design. The final monolithic microwave integrated
circuit (MMIC) used for the hybrid discrete PA solution is
shown in Figure 1.
Figure 1: Fabricated MMIC used for the hybrid discrete PA solution
Qorvo and Cadence
GaN Discrete PA Design Using
AWR Software
Application
X
Qor vo Hybrid Discrete Power Amplifier
Software
X
Cadence
®
AWR Design Environment
®
Sof tware
Por t folio, including:
ɢ Cadence AWR
®
Microwave Office
®
Circuit Design
Software
ɢ Cadence AWR AXIEM
®
Planar Electromagnetic (EM)
Simulator
Benefits
X
Ease of use
X
User productivity
X
Reduction in design time
