AWR Application Notes

Using Parallel and Remote Schematic Simulation and Optimization to Reduce Design Time

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APPLICATION NOTE Using Parallel and Remote Schematic Simulation and Optimization to Reduce Design Time This application note overviews the options for high-performance electromagnetic (EM) computing for circuit simulations based on remote and parallel simulations within Cadence ® AWR Design Environment ® software, specifically the Cadence AWR ® AXIEM ® 3D planar and Cadence AWR Analyst™ 3D finite element method (FEM) solvers. Design Overview The increasing complexity of integrated monolithic microwave integrated circuit (MMIC), radio frequency integrated circuit (RFIC), and cross-fabric designs requires the support of powerful computational software beyond the limits posed by a single central processing unit (CPU). The ability to distribute circuit and EM simulations across multiple processors on a single computer or across external remote compute farms can dramatically reduce the overall simulation time for resource-intensive problems. Leveraging parallel computing enables design teams to verify the performance of large-scale systems (chip, package, and board assemblies) and to fully explore design options through optimization routines that may require hundreds if not thousands of iterations. Parallel computing supports simulation of more than one job (simulation document such as a circuit schematic, EM structure, data file, netlist, etc.) on the same computer at the same time, for instance, an eight-core laptop running eight simulations in parallel on that one laptop. Remote computing, on the other hand, allows simulations to run somewhere other than the user's computer, such as if the user has access to a server farm with six machines to run. These two actions can also be combined for further speed advantages.

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