Issue link: https://resources.system-analysis.cadence.com/i/1339387
SOFTWARE SPOTLIGHT Design and Verification for 5G and Beyond RF and microwave devices will be integrated into an unprecedented number of connected smart devices and systems enabled by the latest wireless technologies. Developing these systems requires a significant advance in multi-domain analyses, simulation capacity, design automation, and seamless interoperability between RF/microwave EDA and the broader portfolio of mixed-signal IC, PCB, SiP, and system-on-chip (SoC) design tools. These tightly stacked components behave as mechanical systems with sophisticated electronics, transporting RF and high-speed signals through a complex network of interconnects. To function properly, mixed-technology systems require co-design and co-optimization across multiple domains of RF, analog, and digital simulation, aided by large-scale EM and thermal analysis, with robust design verification and signoff. The V15 Advantage Version 15 (V15) of the AWR Design Environment platform offers new and enhanced technologies that provide greater design efficiency and first-pass success to engineering teams developing or integrating III-V ICs, multi-technology modules, and PCB assemblies for 5G, automotive, and aerospace/defense applications. Engineering productivity is improved with new analyses, faster and higher-capacity simulation technologies, time-saving design automation, and 5G New Radio (NR)-compliant testbenches that support power amplifier (PA) and antenna/array design, EM modeling, and RF/microwave integration across heterogenous technologies. Table 1 provides highlights of the new capabilities within this latest release. Table 1: AWR Design Environment platform V15 highlights Design Environment and Automation New design environment and automation features in AWR V15 software help individual engineers and engineering teams be more efficient in their design entry, data display, and project management. Designers can adjust optimization goals directly from response plots, route design rule-compliant intelligent nets (iNets) in real-time, import Gerber-based layout designs into the AWR Design Environment platform for EM analysis, and provide more user capabilities for the design task at hand. EM Simulation Enhancements Earlier this year, Cadence expanded its software solutions to better support RF integration within SoC and SiP designs through the acquisitions of key enabling technologies, including AWR and its portfolio of RF and EM design tools, as well as Integrand's EMX ® Planar 3D Solver for analysis/extraction of large ICs and advanced packages. The Cadence Clarity ® 3D Solver addresses larger and more complex structures such as critical interconnects for PCBs, IC packages, and system on IC (SoIC) designs. Together, these products enable broader system design, from software down to the physical chip design. AWR Design Environment Platform V15 Highlights Environment/ Automation Circuit Simulation EM Simulation System Simulation Physical Design/ Layout Load-pull contours on rectangular plots Template-based mea- surements Add/edit optimization goals directly on graphs Edit axes directly on plots Color-coded markers Equation grouping Fast, rigorous stability analysis Low-frequency load- pull for two-tone exci- tations Integrated TX-Line calculator/synthesis Network synthesis with PDK/vendor compo- nents Faster, more robust adaptive meshing Fast, accurate DC solver Peak antenna measure- ments Preconfigured 5G NR testbenches libraries Phased array MIMO bus support PA linearization with digital predistortion (DPD) Real-time DRC compli- ant iNets routing guides Mixed physical units/ grid support Two-click data entry mode Resize layout objects with property page editing Gerber file import for EM analysis 7 www.cadence.com/go/awr