CHAPTER 5 - Amplifier Design
202
Now, having considered the parasitic elements which are internal to the transistor let us
look at the parasitics introduced by the connecting leads or bond wires. These usually introduce
some series inductance which may be modelled as shown in Figure 5.1-3.
Figure 5.1-3 BJT electrical model, including lead inductance
Now let us use the models which we have illustrated in this section to take a closer look at the
impedances seen at the input and output terminals of the transistor.
5.1.2 Input Impedance
First of all let us try to simplify the model shown in Figure 5.1-3 by ignoring the least
significant elements. Let us start with
. Since this resistance is very large, and we may assume
that it is an open circuit. Next we use the Miller's Theorem to replace
with a capacitance equal to
( )
͵
, which we can place in shunt with . We then combine these two
capacitances (
and ) into one of a value equal to . This is shown in Figure 5.1-4.
Figure 5.1-4 BJT electrical model, including lead inductance and load resistance
Now let us simplify this model further by only including the elements that have an effect on the
input impedance. This is shown in Figure 5.1-5
36
is the load resistance
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Conquer Radio Frequency
202 www.cadence.com/go/awr
