Best Practices for Efficient and Effective Planar EM Simulation
7 www.cadence.com/go/awr
Figure 6 shows a simple example of the problem. The layout on the left side of the figure was imported as a drawing exchange
format (DXF) file from AutoCAD.
Figure 6: Imported DXF file with 2D schematic layout (top left), 3D schematic layout (bottom left), 2D AWR AXIEM layout (top right), and 3D
AXIEM layout (bottom right)
The pictures on the left show a transistor package that has been created along with the associated package leads. The
imported layout comes in as a DXF artwork cell library. These views are only using draw layers. The layout is now copied into
the AWR AXIEM simulator. The right pictures show the result. The 2D view looks the same as the regular layout, except that
the ports that have been added at the end of the tabs are red. This indicates there is a problem with the setup of the ports.
The AWR AXIEM 3D view is missing several of the polygons. The AWR AXIEM 2D layout is using draw layers; consequently, it
looks the same as the normal layout.
The 3D view uses the EM mapping table to show the polygons in the EM STACKUP; the problem is that the EM mapping has
not been created properly and the draw layer used for the leads is never mapped to the STACKUP. (Neither do the package
layers, but the designer is not including them in the AWR AXIEM simulation on purpose.) The ports turn red in the AWR AXIEM
2D view to show the designer the leads are not mapped. This type of problem is much less prevalent with the improved layout
import features in AWR software. The layout import wizard now automatically creates a STACKUP block with the correct
mapping file. Designers can select the nets they desire in a variety of ways. The wizard automatically places point ports, a
variant of internal ports, on signal pads where needed. The import tool supports most commercial layout tools.
